3rd SEM

14041 - ANALOG AND DIGITAL ELECTRONICS
DETAILED SYLLABUS
UNIT – 1 LINEAR ICS: OP-AMPS, TIMERS AND THEIR APPLICATIONS:
Operational amplifier – Ideal Op.Amp – Block diagram and characteristics – (Minus input
follows Plus input and No current through Minus and Plus input) – Op-amp parameters –
CMRR – Slew rate – Virtual ground – Applications of op-amp – Inverting amplifier –
Summing amplifier – Non inverting amplifier – Voltage follower – Comparator – Zero
crossing detector – Integrator – Differentiator – Op.Amp Specifications. 555 Timer –
Functional Block diagram – Astable, Monostable and Schmitt Trigger – Sequence timer.
IC voltage regulator – 3 pin IC regulators – 78 xx, 79 xx, LM 317.
UNIT – 2 BOOLEAN ALGEBRA:
Number systems – Decimal – Binary – Octal – Hexadecimal – BCD – Conversion from
one number system to other – Boolean Algebra – Basic laws and Demorgan’s Theorems
– Logic gates – OR – AND – NOT – NOR – NAND – EX-OR Symbols, Truth table and
Boolean expression – Realization of gates using universal gates NAND, and NOR –
Problems using 2, 3, and 4 variables – Boolean expression for outputs – Simplification of
Boolean expression using karnaugh map (upto 4 variable)- Constructing logic circuits for
the Boolean expressions.
UNIT – 3 COMBINATIONAL LOGIC:
Arithmetic circuits – Binary addition – Binary Subrtraction – 1’s complement and 2’s
complement – Signed binary numbers – Half adder – Full adder – Half subtractor – Full
subtractor – Parity Generator and checker – Digital comparator – Arithmetic Logic Unit –
Decoder – 3 to 8 decoder – BCD to seven segment decoder – Encoder – Multiplexer –
Demultiplexer – Digital Logic families – TTL – CMOS – LS series – Fan in – Fan out –
Propagation delay – Noise immunity for the above families.
UNIT – 4 SEQUENTIAL LOGIC:
Flip-flops – RS – D – T – JK – Master Slave Flip Flops – Edge triggered FF –
Asynchronous Binary Counter – Decade counter – Mod n counter – Up Down Counter –
Presettable counter – Ring counter – Johnson counter – Synchronous counter – State
diagram – Shift register – 4 bit shift register – Serial in Serial out – Serial in Parallel out –
Parallel in serial out.
UNIT – 5 D/A, A/D AND MEMORY:
D/A Converter – Basic concepts – Weighted Resistor D/A converter – R-2R Ladder D/A
converter – Specification of DAC IC Sampling and quantization – Analog to digital
conversion using Ramp method – Successive approximation method – Dual slope
method, simultaneous method voltage to frequency converter – Frequency to voltage
converter specification of A/D converter.
Memory – Static Memory – Dynamic Memory – Static Memory organization in terms of
address lines, control lines and data lines – Expanding memory (say 8k to 16k) –
SDRAM – DDR RAM.

14041 - ANALOG AND DIGITAL ELECTRONICS
MODEL QUESTION PAPER I
Time : 3 Hrs. Max. Marks: 75
PART – A
I. Answer all questions 10 X 1 = 5
1. What is op-amp?
2. Define slew rate.
3. Convert decimal 9 to binary
4. State Demorgan theorem
5. What is a Demulti plexer?
6. What is decoder?
7. How may FFS are required to construct a Decade counter?
8. What is race around condition?
9. What is a volatile memory?
10. What is meant by quantization?
PART – B
II. Answer all questions 5 X 3 = 15
11. State the characteristics of an ideal op. amp.
12. Draw the Logic diagram for the Boolean f unction AB + C.
13. State the Truth Table of a HALF Adder and FULL Adder.
14. What are the differences between Ring counter and Johnson counter?
15. Draw the circuit diagram of a 4 bit weighted – Resistor D/A converter.
PART – C
III. Answer any one from each question 5 X 10 = 50
16. (a) Explain with neat diagram op. amp as (i) summer
(ii) Zero crossing detector.
Or
(b) Draw the Functional Block diagram of 555 Timer and explain its
operation.
17. (a) State and prove Demorgan’s Theorems
Or
(b) Construct i. AND ii. Ex-OR gates using NOR gates and explain its
operation
18. (a) Draw the Logic diagram of a Full Adder and explain its working.
Or
(b) Explain with a neat diagram 1 of 8 Multiplexer.
19. (a) Explain the working of a 4 bit Binary up counter with a neat
diagram and waveforms.
Or
(b) Explain the working of JK MS Flip-Flop with a neat diagram.
20. (a) Explain the working of a 4 bit R-2R Ladder D/A converter with
a neat diagram.
Or
(b) Explain with a neat diagram, the successive approximation type
A/D converter.
* * *
41
14041 - ANALOG AND DIGITAL ELECTRONICS
MODEL QUESTION PAPER II
Time : 3 Hrs. Max. Marks: 75
PART – A
I Answer all questions 10 X 1 = 10
1. Define CMRR of op.amp.
2. What is virtual groung?
3. Convert binary 0110112 to Hexadecimal.
4. State logic equation for EX-OR gate
5. Define a multiplexer
6. State difference between Half adder and full adder
7. What is a D-Type Flip-Flop?
8. State difference between Synchronous and assynchronous counter
9. How many comparators are required for a 4 bit parallel comparator (simultaneous) A/D
converter?
10. State difference between static and dynamic memory.
PART – B
II. Answer all questions 5 X 3 = 15
11. What is virtual Ground of an op.amp? and explain Op amp as invertor.
12. Give the Truth Table of 2 input Ex-OR gate and NOR gate.
13. Define fan in and fan out of a logic gate.
14. Give the logic diagram and Truth Table of JKMS FF.
15. Draw the circuit diagram of a 4 bit R-2R Ladder D/A converter
PART – C
* * *
Answer any one from each question 5 X 10= 50
16. (a) (i) Explain the working of a Comparator using op-amp.
(ii) With a neat diagram and Waveforms, explain Zero Crossing
detector using op. amp.
Or
(b) (i) Explain a monostable Multivibrator using 555 IC
(ii)Explain the working of an integrator using op. amp.
17. (a) Simplify the Boolean expression by using karnaugh’s map
_ _ _ _
F = ABCD + ABCD + ABCD + ABCD
Or
(b) Construct i) NOR ii) Ex-OR gates using NAND gates and explain its operation.
18. (a) Draw the Logic diagram of a Half-Adder and explain its working
Or
(b) Explain with a neat diagram, BCD to seven segment Decoder.
19. (a) Explain the working of a Decade counter with a neat diagram and waveforms.
Or
(b) Explain with a neat diagram serial in serial out 4 bit shift register.
20. (a) Explain the working of a 4 bit weighted Register D/A Converter
with a neat diagram.
Or
(b) Explain with a neat diagram, the Dual slope A/D converter.